Interline Publishing +91 98867 328 23 / 24 / 25   +91 80 2333 2824 Sign Up   Sign In
Interline Publishing
Skip to Reader

Procedure video

    Subscription offer
         (Unlimited Download)
Amount Validity
र 100 6 months
र 200 1 year
Search By
MDU Digital Design - Sem I
No Units Titles Sub Titles Chapters
1 Unit 1 Number System Binary, Octal, Hexadecimal and Decimal, 1 s and 2 s Complements, Interconversion of numbers Codes: BCD Code, Excess -3 Code, Gray code, Alphanumeric Codes, Parity Bits, Hamming Code, Floating Point Numbers VIEW CHAPTERS
2 Unit 2 NA Positive and Negative Logic, Truth Tables, Logic Gates, Fan out of Logic Gates, Logic Families, TTL Logic Family, CMOS Logic Family, ECL Logic Family, NMOS and PMOS Logic FamiliesBoolean Algebra vs Ordinary Algebra, Boolean Expressions- Variables and Literals, Boolean Expressions-Equivalent and Complement, Theorems of Boolean Algebra, Minimisation Techniques, SOPs & POSs Boolean Expressions, Quine- McCluskey Tabular Method, Karnaugh Map Method VIEW CHAPTERS
3 Unit 3 NA Combinational Circuits, Implementing Combinational Logic, Arithmetic Circuits -Basic Building Blocks, Adder- Subtractor, BCD Adder, Magnitude Comparator, Parity Generator and Checker,De-multiplexers and Decoders, Encoders, Read Only Memory (ROM), Programmable Logic Array (PLA) R-S Flip Flop, Level Triggered and Edge Triggered Flip Flops, JK Flip Flop, Master-slave Flip Flops, T-flip Flop, D-flip Flop, Synchronous and Asynchronous Inputs VIEW CHAPTERS
4 Unit 4 NA Ripple Counter vs Synchronous Counter, Modulus of a Counter, Propagation Delay in Ripple Counters, Binary Ripple Counters, Up/Down Counters, Decade and BCD Counters , Pre-settable Counters, Shift Register, Controlled Shift Registers RAM Architecture, Static RAM (SRAM), Dynamic RAM (DRAM) VIEW CHAPTERS
About Us
Contact Us
Advertising Guidelines
Safe and Secure Payment
All major credit and debit cards are accepted.
Policies: Terms of Use | Privacy    Copyright © 2019 Interline Publishing. All rights reserved.