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Title      : Introduction to VLSI Design
Subject      : VLSI Design
copyright © 2018   : Sanguine Technical Publishers
Author      : Kiran Kumar V G
Publisher      : Sanguine Technical Publishers
Chapters/Pages      : 19/451
Total Price      : Rs.      : 320
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Introduction to IC Technology Total views (659)  
Integrated circuit era, VLSI Design Flow, Why CMOS?, Comparison between MOSFET and BJT, Gorden Moore's Law, Basic MOS Transistors, Enhancement mode transistor, nMOS depletion mode transistor, p-MOS Enhancement mode transistor, Enhancement mode transistor action, Depletion mode transistor action, Introduction, Fabrication Process Flow - Basic Steps, nMOS Fabrication, CMOS Fabrication, The p-well pr ......
Pages: 28
Price: Rs 0   
Fabrication Technology Total views (662)  
Material Preparation, Purification of silicon, Crystal growth, Crystal slicing and wafer preparation, FABRICATION PROCESSES, Thermal Oxidation, Diffusion, Ion implantation,Epitaxial growth, Other deposited layers, Masking and lithography, Pattern definition, Metallisation and Interconnection, Fabrication process sequence for basic devices, Sequence of diode fabrication, Sequence of discrete BJT fa ......
Pages: 38
Price: Rs 28.5   
MOS Transistor Theory Total views (656)  
Introduction, nMOS transistor, Principle of operation of nMOS transistor, Influence of drain to source bias VDS, 3.2.3 Factors affecting the drain current, Derivation of drain current, The non saturated region, The saturated region, Channel length modulation, Threshold voltage (Vt ), MOS transistor transconductance gm and output conductance gds
Pages: 13
Price: Rs 9.75   
Inverter Circuits Total views (657)  
nMOS inverter, Resistive load inverter circuit, nMOS inverter with depletion nMOS as a load transistor, CMOS inverter, Latch up in CMOS circuits, CMOS Transmission Gate (CMOS TG), Tristate inverter, Power Dissipation in CMOS circuits
Pages: 17
Price: Rs 12.75   
Circuit Design Processes Total views (660)  
MOS Layers, Stick diagrams, CMOS Design Style, Stick diagrams for Basic Gates, Design Rules and Layout, Lambda-Based Design Rules, Lambda-Based Design Rules for conducting paths (wires), Lambda-Based Design Rules for transistor, Lambda-Based Design Rules for Contact cuts, Lambda-Based Design Rules for VDD and VSS contacts, Basic Physical Design of Simple logic gates, Simple Layout Guidelines, Desi ......
Pages: 15
Price: Rs 11.25   
Appendix A Total views (658)  
CMOS Layers, CMOS Design Rules, CMOS Layout Design for Logic Gates, Designing FET Arrays, Basic Gate Designs, Layout design for CMOS NOT gate, Layout design for CMOS NAND2 and NOR2 gate, Complex Logic Gate, General Discussion
Pages: 13
Price: Rs 9.75   
Appendix B Total views (657)  
Introduction, CMOS Stick diagrams for Logic Gates, Euler graphs, Steps for drawing Euler graphs, Eulers path
Pages: 7
Price: Rs 5.25   
Scaling of MOS Circuits Total views (706)  
Scaling models and scaling factors, Scaling factors for device parameters, Gate area Ag, Gate capacitance per unit area Co or Cox, Gate capacitance Cg, Parasitic Capacitance Cx, Carrier density in channel Qon, Channel Resistance RS, Gate Delay Td, Maximum operating frequency f0, Saturation current IDSS, Current density J, Switching energy per gate Eg, Power dissipation per gate Pg, Power dissipati ......
Pages: 14
Price: Rs 10.5   
CMOS Logic Structures Total views (731)  
CMOS Complimentary logic, Pseudo nMOS logic, Psuedo nMOS inverter, Dynamic CMOS logic circuits, Charge sharing problem, Advantages, Disadvantages, CMOS Domino logic, Clocked CMOS (C2MOS) logic, Pass transistor logic, Cascode Voltage Switch logic (CVSL), BiCMOS Logic, Driver Circuits, BiCMOS inverter
Pages: 15
Price: Rs 11.25   
Basic Circuit Concepts Total views (732)  
Sheet Resistance Rs, Sheet Resistance in MOS transistors, Inverter Resistance Calculation, nMOS inverter, CMOS inverter, Capacitance Calculations Cg, Standard unit of capacitance Cg, The Delay Unit τ, Driving Large Capacitive Loads, Cascaded Inverters as drivers, Propagation Delays, Cascaded pass transistors, Design of long polysilicon wires, Writing capacitances, Fringing fields, Interlayer ......
Pages: 20
Price: Rs 15   
CMOS Subsystem Design Total views (732)  
Architectural Issues, Switch Logic, Gate (restoring) Logic, Combinational (Structured Design) Logic, Parity Generator, Multiplexers (Data Selectors), A General Logic function block, A Four line Gray code to binary code converter, Clocking strategies, Pseudo Two Phase Clocking, Two Phase Clock Generator using D Flip Flops, Two phase clock generator Basic form, Other forms of Clock, Other system con ......
Pages: 21
Price: Rs 15.75   
CMOS Subsytem Design Processes Total views (733)  
Some general considerations, Some problems associated with VLSI design, An illustration of design processes, General arrangements of a 4 - bit arithmetic processor, Observations, Some observations on the design process, Design of an ALU subsystem, Design of 4-bit adder, Implementing ALU functions with an adder, Further consideration of adders, Manchester carry - chain, Adder Enhancement techniques ......
Pages: 30
Price: Rs 22.5   
Memory, Registers and Clock Total views (733)  
System timing Considerations, Four bit Dynamic Register, Dynamic Shift Register (Ratioed Logic), Ratioless dynamic enhancement shift register, CMOS shift register (CMOS TG logic), Semiconductor Memories, DRAM: -RD/WR, One transistor DRAM Cell, Three transistor DRAM, Memory cells, SRAM Cells, Pseudo Static RAM
Pages: 12
Price: Rs 9   
Semiconductor Integrated Circuit Design Total views (732)  
Introduction, The masked gate array asic, The evolution of programmable devices, Advantages of PLDs, Programmable Read Only Memories (PROMs), ROM used as PLD, Programmable Logic Arrays (PLAs), Programmable Array Logic (PALs), Comparison of PROM, PLA and PAL, CPLDs, Complex Programmable Logic Devices (CPLDs), CPLD Architectures, Function Blocks, I/O Blocks, Interconnect, Programmable Elements, CPLD ......
Pages: 67
Price: Rs 50.25   
Design Methodologies Total views (741)  
Design Strategies, Introduction, Structured Design Strategies, Design Hierarchy, Concepts of Regularity, Modularity and Locality, Design Methods, Design Synthesis, Behavioral Synthesis, RTL Synthesis, Logic optimization, Structural-to-Layout Synthesis, Layout Synthesis, Design- capture Tools, HDL Design, Schematic Design, Layout Design, Floor Planning, Chip Composition, Design Verification Tools, ......
Pages: 23
Price: Rs 17.25   
Practical Aspects, Testing and Testability Total views (739)  
Practical aspects in VLSI Design, Performance parameters, Optimization of nMOS and CMOS inverters, Noise margins, Floorplan, Design for Testability, Introduction, Fault Types and Models, Controllability and Observability, System Partioning, Ad Hoc Testable Design Techniques, Scan-Based Techniques, Built-In Self Test (BIST) Techniques, Level Sensitive scan Design, Boundary Scan Test (BST), Built-In ......
Pages: 25
Price: Rs 18.75   
Trends in Low-Power VLSI Design Total views (737)  
Introduction, Importance of Low-Power CMOS Design, Sources of Power Consumption in CMOS, Dynamic Power Dissipation, Short Circuit Power Dissipation, Static Power Dissipation, Power Consumption Considerations, Supply Voltage Level, Device Threshold Voltage, Physical Capacitance, Switching Frequency, Energy versus Power, Optimization Metrics, Techniques for Power Reduction, System Level, Architectur ......
Pages: 26
Price: Rs 19.5   
Field Programmable Gate Arrays and Applications Total views (741)  
Introduction, FPGA Structural Classification, Symmetrical arrays, Row based architecture, Hierarchical PLDs, FPGA Classification on user programmable switch technologies, SRAM Based, Antifuse Based, EEPROM Based, Logic Block and Routing Techniques, Xilinx Logic block, Altera Logic Block, FPGA Design Flow, System Design, I/O integration with rest of the system, Design Description, Synthesis, Desig ......
Pages: 17
Price: Rs 12.75   
Introduction to VHDL Total views (739)  
Introduction to VHDL, VHDL versus conventional programming languages, The VHDL Design Flow, Levels of representation and abstraction, Basic Structure of a VHDL file, Entity, Entity Declaration, Architecture body, Behavioral model, Concurrency, Event Scheduling, Structural Method, Dataflow Method, Switch-Level Description, VHDL signal and signal assignment, Selected signal assignment, Delays, VHDL ......
Pages: 50
Price: Rs 37.5   

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